Maintainer's Note on IBM Cell and PS3 systems

"PowerPC SPE" refers to the "Signal Processing Engine" hardware present on low-power 32-bit ?FreeScale and IBM "e500" cores. If you wish to run Debian on a PS3 or other IBM-Cell-based system, you should instead use the standard powerpc port. The "SPE" in the "powerpcspe" architecture does not refer to the "Synergistic Processing Element" units on IBM Cell microprocessors, although both are PowerPC variants. See also http://lists.debian.org/debian-devel/2011/06/msg00592.html

Current status

Building upon previous work by Sebastian Andrzej Siewior and Kyle Moffett, there is a new buildd working on the powerpcspe port, currently in the process of being integrated into the regular buildd network of debian-ports.org. Meanwhile, you can use the intermediate repository at http://antcom.de/powerpcspe/ for current packages that augment the powerpcspe repository at debian-ports.org, e.g.

deb http://ftp.de.debian.org/debian-ports/ sid main
deb http://antcom.de/powerpcspe/ unstable main

Current 'powerpcspe' bug list

PowerpcSPE specific type-handling

Repositories and Build Status

Hosting for the unofficial PowerPCSPE port is graciously provided by the wonderful people at debian-ports.org. In particular we'd like to thank Aurelien Jarno for his help getting everything set up.

Latest Statistics

Architecture summary

The 'powerpcspe' architecture is a binary-incompatible variant of the PowerPC/POWER designed and supported by FreeScale and IBM. It is also known under the trade names "e500"/"MPC8500" and "e200"/"MPC5xx".

Additional information can be found at:

Instruction set

In particular, the 'powerpcspe' architecture lacks the classic FPU with dedicated FPRs found on most other PowerPC systems. It is replaced with a set of "SPE" instructions which perform floating-point operations on the integer registers.

In an unfortunate choice of architecture design, the instructions used for the "SPE" operations overlap with those for the Altivec unit on most other modern PowerPC cores.

Chipset details

The "e500v2"-series chips have 64-bit GPRs, where the high 32-bits are accessible only via the special "SPE" instructions, allowing them to make efficient use of the "double" datatype.

The relatively rare "e500v1"-series chips have only 32-bit GPRs, and require software traps and emulation to support native "double".

The "e200z3" and "e200z6" chips have no support for floating point at all, but with software traps and emulation are binary-compatible with the "e500"-series chips.

GCC/EGLIBC considerations

The Debian port to this architecture specifically chooses to optimize for the higher-end chips (e500v2), as most of the others are targeted at automotive applications or no longer in production.

Full support for the e500v2 requires the following options to GCC's "configure":

Please note that the  --with-long-double-128  is desired to match the behavior of long double on other PowerPC-based platforms. (Otherwise long double is exactly the same as double).

Installing the port

Installation can be done with debootstrap.

# debootstrap --no-check-gpg http://antcom.de/powerpcspe/

To cross-bootstrap, do:

# debootstrap --foreign --arch=powerpcspe --no-check-gpg http://antcom.de/powerpcspe/

on the target, chroot to this directory and finish the installation with:

# /debootstrap/debootstrap --second-stage

* if you need a console on ttyS0:

* edit etc/apt/sources.list and enter a mirror from here which is close to you.

Final notes

At this time the 'powerpcspe' architecture port is still very much an unofficial port. While we hope that will change in the future, it is entirely possible that the embedded niche of the processor will make such an official Debian port problematic.