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== Partial reference of SoC and supported ISAs == || Manufacturer || '''SoC''' || '''architecture''' || '''VFP''' || '''Notes''' || || Texas Instruments || OMAP3xxx || `armv7` || NEON || Cortex-A8 || || Freescale || iMX5x || `armv7` || NEON || Cortex-A8; bogus NEON for TO1, TO2, ok with TO3+ || || Marvell || Dove || `armv7` || VFPv3 D16 || || || Nvidia || Tegra2 || `armv7` || VFPv3 D16 || || || Qualcomm || Snapdragon || armv7 || NEON? || || |
This page gathers thoughts and ideas around a hard-float ARM port for Debian.
Contents
Rationale
A lot of modern ARM boards and devices ship with a floating-point unit (FPU), but the current Debian armel port doesn't take much advantage of it.
A new ARM port requiring the presence of a FPU would help squeeze the most performance juice out of hardware with a FPU.
Background information
This section provides some background information on FPUs, ARM EABI, GCC floating-point ABIs, hwcaps...
VFP
With ARMv6 a floating point instruction set known as Vector Floating Point (VFP) was introduced. This is now effectively the norm for modern ARM implementations. Prior to this there was no real standardized set of floating point instructions, with some vendors supplying their own coprocessors.
VFP was extended over time, with VFPv2 (some ARM9/ARM11) VFPv3-D16 (e.g. Marvell Dove) and VFPv3+NEON (Most Cortex-A8) present in current production silicon.
In spite of the name, the base VFP architecture is not well suited for vector operations. For practical purposes it is a normal scalar floating point unit. The NEON extension defines vector instruction similar to SSE or ?AltiVec and shares a register file with the VFP unit.
These remain an optional part of the architecture.
ARM EABI
The ARM EABI specification covers calling conventions across libraries and binaries. It defines two incompatible ABIs: one uses (VFP) floating point registers for passing function arguments, and the other does not.
Unlike many other architectures, ARM supports use of FPU instructions while still conforming to the base ABI. This allows code to take advantage of the FPU without breaking compatibility with older libraries or applications. This does incur some overhead relative to a full hard-float system, and obviously requires a VFP capable CPU.
GCC floating-point options
For historical reasons and to match the ARM RVCT kit, the GCC FPU and ABI selection options are not entirely orthogonal. The -mfloat-abi= option controls both the ABI, and whether floating point instructions may be used. The available options are:
soft: Full software floating point.
softfp: Use the FPU, but remain compatible with soft-float code.
hard: Full hardware floating point.
In addition, the -mfpu= option can be used to select a VFP/NEON (or FPA or Maverick) variant. This has no effect when -mfloat-abi=soft is specified.
The combination of -mfpu=vfp and -mfloat-abi=hard is not available in FSF GCC 4.4; see TODO section below for options.
See /VfpComparison for an in depth discussion and some performance research.
ld.so hwcaps
The GCC -mfloat-abi=softfp flag allows use of VFP while remaining compatible with soft-float code. This allows selection of appropriate routines at runtime based on the availability of VFP hardware.
The runtime linker, ld.so, supports a mechanism for selecting runtime libraries based on features reported by the kernel. For instance, it's possible to provide two versions of libm, one in /lib and another one in /lib/vfp, and ld.so will select the /lib/vfp one on systems with VFP.
This mechanism is dubbed "hwcaps".
This only works when the binaries are compatible (use the same ABI); you can't select between hard-float and soft-float libs with hwcaps.
Endianess, architecture level, CPU, VFP level
A new port would be little-endian as that is the most widely used endianess in recent ARM designs.
Since the new port would require VFP, it would limit which ?SoCs are supported by the new port.
The toolchain needs to be configured with a specific base CPU and base VFP version in mind.
It might make sense for such a new port -- which would essentially target newer hardware -- to target newer CPUs. For instance, it could target ARMv6 or ARMv7 ?SoCs, and VFPv2, VFPv3-D16 or NEON.
If targeting ARMv7, another option is to build for Thumb-2.
Name of the port
The table below recaps which ports names Debian/dpkg saw so far.
name |
endianess |
status |
arm |
little-endian |
last release in Debian lenny; being retired if favor of armel |
armel |
little-endian |
introduced in Debian lenny; actively maintained; targets armv4t; doesn't require a FPU |
armeb |
big-endian |
unofficial port; inactive and dead |
The name of a new ARM port using the hard-float ABI should probably start with arm and include hf for hard-float or fp for floating-point in the name.
It is possible to encode the base architecture / CPU in the port name, e.g. arm7hf for an ARMv7 hard-float port, or not.
It is also possible to encode the endianess explicitly, e.g. armelhf but the new port could also simply be named armhf since a big-endian port is unlikely.
It is also possible to encode profiles in the name as A/M/R.
Triplet
GCC when built to target the GNU arm-linux-gnueabi triplet will support both the hard-float and soft-float calling conventions.
dpkg relies on the triplet to identify the port (gcc -dumpmachine output). Some other projects such as multiarch rely on having distinct triplets across all Debian architectures.
For the new Debian port, it is possible to use the vendor field in the triplet to have distinct triplets. For instance, the triplet could be arm-hardfloat-linux-gnueabi.
arm-none-linux-gnueabi, just like in CodeSourcery compilers, would be an option but it is confusing to relate to arm-linux-gnueabi versus arm-none-linux-gnueabi; it is clearer to relate to arm-hardfloat-linux-gnueabi and also allows distinguishing between CodeSourcery and the new port.
Performance improvements and benchmarks
Genesi-USA did a proof-of-concept rebuild of Ubuntu karmic (9.10)'s armel port with the hard-floating. They noticed important wins (in the order of 40% performance improvement) in floating-point heavy applications/libraries such as mesa, with a Cortex-A8 CPU.
It's likely that the performance benefits are much larger on Cortex-A8 CPUs than on Cortex-A9 CPUs which have a faster VFP design and more conventional pipeline.
NEON
NEON is an extension of the VFP which allows for very efficient manipulation of matrices, and vector data in general. This is notably useful for processing audio and video data, or for fast memcpy().
Programs usually take advantage of NEON thanks to hand-crafted assembly routines. GCC can automatically vectorize code and generate NEON instructions, however this tends to have limited success. It would seem sensible NOT to require NEON in a new port since some modern ARMv7 ?SoCs such as Marvell Dove and NVidia Tegra2 don't implement it.
It is also possible to use NEON instructions for regular scalar floating point code, and this can give significant (2-3x) speedup on Cortex-A8 hardware. However GCC does not currently implement this, and it is not always applicable as NEON instructions are not fully IEEE compliant.
See /VfpComparison for an in depth discussion and some performance research.
Hardware
Genesi-USA would be happy to continue sharing the 9 EfikaMX (Freescale i.MX51) buildds used for their proof-of-concept to help get a new port started.
Genesi-USA is also giving hardware (10 EfikaMX T03) to main Debian sub-project leads for Education, Embedded, Live systems, Ubuntu developers, and Linaro developers.
Genesi-USA is also giving old hardware (EfikaMX T02) which could be used to help out buildds, setup porterboxes or give away to interested developers who would work on the new port. While stock it is limited, if you are interested, register yourself into PowerDeveloper site and, then, contact Hector Oron <zumbi@debian.org>.
TODO
- Choose a port name
- Decide on a triplet
- Get these it into dpkg
Get a compiler in shape for this port; GCC 4.5 supports the hard-float ABI, but 4.4 does not; the new port could either have backported support in gcc-4.4, or use gcc-4.5 from the start, or use a different code base such as CodeSourcery SourceryG++ or Linaro GCC
- Start bootstrapping
- Fix / port packages
- libffi needs porting
Partial reference of SoC and supported ISAs
Manufacturer |
SoC |
architecture |
VFP |
Notes |
Texas Instruments |
OMAP3xxx |
armv7 |
NEON |
Cortex-A8 |
Freescale |
iMX5x |
armv7 |
NEON |
Cortex-A8; bogus NEON for TO1, TO2, ok with TO3+ |
Marvell |
Dove |
armv7 |
VFPv3 D16 |
|
Nvidia |
Tegra2 |
armv7 |
VFPv3 D16 |
|
Qualcomm |
Snapdragon |
armv7 |
NEON? |
|
Opinions
Genesi, MattSealey
Genesi's recommendations:
Port name: Genesi likes "armelvfp" as it removes the expectation that it might run on FPA or other weird FPU variants
Compiler: CodeSourcery and Linaro gcc are almost the same thing, Genesi recommend CodeSourcery 2010q1 for now - it is gcc 4.4.1 but it is functionally equivalent to gcc 4.5 for the purpose of a port
CPU
The lowest CPU implementation is ARMv7-A (therefore the recommended build option is -march=armv7-a)
FPU
VFPv3-D16 as they represent the miminum specification of the processors to support here (therefore the recommended build option is -mfpu=vfpv3-d16)
- Marvell Dove is ARMv7-A + VFPv3-D16 (+ iwMMXt?)
- Freescale i.MX5x is ARMv7-A + VFPv3 + NEON (traditional Cortex-A8)
- TI OMAP3 is ARMv7-A + VFPv3 + NEON (traditional Cortex-A8)
- Qualcomm Snapdragon is ARMv7-A + VFPv3 + NEON (traditional Cortex-A8)
- nVidia Tegra2 is ARMv7-A + VFPv3-D16 (Cortex-A9 with no SIMD at all)
- TI OMAP4 is ARMv7-A + VFPv4 + NEON (traditional Cortex-A9).
Some of them support the IEEE half-precision FP format (-mfpu=vfpv3-f16) but not all, and in any case the usefulness of this extension is debatable
- Building for VFPv3-D16 instead of VFPv3[-D32] only loses the use of 16 FP registers - not a great loss
- Some concern for fast-enough, pretty awesome (600MHz+) ARMv6 + VFPv2 processors here - i.MX37 etc. - which will not be supported, but.. we will have to live with that
- The difference between ARMv6 and ARMv7 is mostly kernel level but it has better knowledge of cache and some extra memory barrier instructions
- The difference between VFPv2 and VFPv3 is fundamentally the float-to-fixed and float-to-double (VCVT) instructions loading common FP constants (VMOV immediate).
- These are very useful and very very desirable